Design Methodologies for Deep Neural Networks Hardware Accelerators

Deep Neural Networks (DNNs) have revolutionized various domains, including computer vision, natural language processing, and speech recognition. However, the increasing complexity and computational demands of modern DNN models pose significant challenges for efficient execution on traditional computing architectures. To overcome these limitations, dedicated hardware accelerators have emerged as a promising solution. This master thesis proposal aims to explore and develop advanced design methodologies for DNN hardware accelerators, with the goal of enhancing their efficiency, performance, and scalability.